If you think of a CPU as an engine, and a core as a cylinder and piston in that engine, Intel has tried to do two things better: more scalability and bandwidth available to the retained elements of the preceding design. Scalability implies taking a good piston design, and finding a way to use it in everything from 2-cylinder motorcycle engines to 16-cylinder performance yacht engines, and making sure that if someone is using 2 or more engines in concert that they work well together.
To Intel, scalability is about making Nehalem based chips perfect for a broad range of applications. The initial i7 Bloomfield CPUs will be quad core, but next year’s value chips, Havendales for the desktop and Auburndales for laptops, will be duo core, while some server offerings will have 6 or 8. The X58 chipset for the desktop only has room for one CPU, but multiple CPU boards will be made available for servers and workstations. Part of scalability is modularity; how easily Intel can slap different components of a chip together. The slide from a presentation by Ronak Singhal (TPTS001, page 28) at the 2008 Taipei Intel Developer Forum (shown at right) indicates how a different number of cores, memory channels, and other factors, can be modified for different needs.
Several of the new features help scale not only what kind of hardware is available for sale from Intel, but how it handles different tasks to your advantage. A Power Control Unit can shut off unused cores and activate Turbo Boost Technology, automatically overclocking the cores that are working. Hyper Threading allows a core to run two streams of instructions, so the CPU can run extra streams (albeit more slowly) when needed, without the power or monetary costs of a physical core. These technologies and the new Loop Detection scheme are explained in this article.